Codee is a software development platform that provides tools to help improve the performance of C/C++/Fortran applications targeting multicore CPUs
OPTIMA’s main goal is to prove that there are several HPC applications that can take advantage of the future highly heterogeneous FPGA-populated HPC systems while, by using the newly introduced tools and runtimes, the application porting/development can be almost as simple as developing software for conventional HPC systems incorporating GPUs. Special emphasis will be given to the efficient processing of both conventional HPC applications (e.g. Fluid Dynamics, Underground Simulations, etc.) as well as the more recently introduced machine/deep learning ones.
Develop optimized versions of applications and open-source libraries that will be executed on FPGA based HPC systems, at a significantly higher performance-to-energy ratio and/or producing more accurate results than the existing HPC systems, including those consisting of low power CPUs and/or GPUs.
Guidelines and Designs
Provide guidelines and reference open-source designs so as to allow the application porting, by third parties, to FPGA-based heterogeneous platforms to be done in time similar to that needed for porting an HPC application to systems utilizing GPUs and/or many-cores.
In this post we describe how the Codee tool can be used to identify code patterns for Maxeler DFEs. Maxeler uses a dataflow-oriented programming model
Cyberbotics (CYB) has published a series of guidelines to access the JUMAX machine, use the DFE, install the robot simulation on the JUMAX machine,