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Energy-efficient BLAS L1 Routines for FPGA-Supported HPC Applications

You are here: Home / News / Energy-efficient BLAS L1 Routines for FPGA-Supported HPC Applications

07/13/2023 by optimahpc

The SAMOS 23 conference is a prestigious event that brings together researchers in the field of embedded computer systems, architectures, modeling and simulation.  In this post, we introduce one of the papers presented at the conference by the OPTIMA ICCS partner, titled ‘Energy-efficient BLAS L1 Routines for FPGA-Supported HPC Applications’.

Vector-based calculations dominate computations in scientific and industrial HPC software. However, up to now there are limited options for mapping them quickly and efficiently on FPGA-supported systems. This work presents a first set of FPGA kernels for mapping a large set of the BLAS L1 routine set on HPC FPGAs. All kernels retain exactly the same interface with respect to their software counterpart routine, whereas they can be configured in terms of internal computing engines. Results show that our kernels can achieve a speed up and performance-per-Watt ratio of up to 7x and 45x respectively, compared to Intel’s MKL routines when executed on server-class machines.

You can read a summary of the motivation, contributions, approach and results of the paper in the following poster:

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This project has received funding from the European High-Performance Computing Joint Undertaking Joint Undertaking (JU) under grant agreement No 955739. The JU receives support from the European Union’s Horizon 2020 research and innovation programme and Greece, Germany, Italy, Netherlands, Spain, Switzerland.

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