TYPE OF PUBLICATION: Article in journal
AUTHORS: Pavlos Malakonakis , Giovanni Isotton, Panagiotis Miliadis, Chloe Alverti, Dimitris Theodoropoulos, Dionisios Pnevmatikatos , Aggelos Ioannou, Konstantinos Harteros, Konstantinos Georgopoulos, Ioannis Papaefstathiou and Iakovos Mavroidis.
ISSUE: This article belongs to the Special Issue Energy-Efficient Processors, Systems, and Their Applications.
YEAR OF PUBLICATION: 2022
CITATION: Malakonakis, P.; Isotton, G.; Miliadis, P.; Alverti, C.; Theodoropoulos, D.; Pnevmatikatos, D.; Ioannou, A.; Harteros, K.; Georgopoulos, K.; Papaefstathiou, I.; et al. Preconditioned Conjugate Gradient Acceleration on FPGA-Based Platforms. Electronics 2022, 11, 3039. https://doi.org/ 10.3390/electronics11193039
LINK TO THE REPOSITORY: https://www.mdpi.com/2079-9292/11/19/3039/pdf
LINK TO THE PUBLICATION: https://www.mdpi.com/2079-9292/11/19/3039
ABSTRACT: Reconfigurable computing can significantly improve the performance and energy efficiency of many applications. However, FPGA-based chips are evolving rapidly, increasing the difficulty of evaluating the impact of new capabilities such as HBM and high-speed links. In this paper, a real-world application was implemented on different FPGAs in order to better understand the new capabilities of modern FPGAs and how new FPGA technology improves performance and scalability. The aforementioned application was the preconditioned conjugate gradient (PCG) method that is utilized in underground analysis. The implementation was done on four different FPGAs, including an MPSoC, taking into account each platform’s characteristics. The results show that today’s FPGA-based chips offer eight times better performance on a memory-bound problem than 5-year-old FPGAs, as they incorporate HBM and can operate at higher clock frequencies.
Keywords: high-performance computing; field-programmable gate array; algorithmic acceleration; reconfigurable computing